Bar napkin math: 16bit audio @ 8khz on 20mbit bus takes 800ns every 125us. Buffer is 4kbit, would take 200us to fill at 20mbit. That should leave enough room for inter-signal timing and maybe storage over head. Still need to implement on cpu to be sure... This all assumes SPI bus is limiting factor, that CPU (at 40MHz) has enough spare cycles left for LED control (PWM?) Probably going to need to cycle count SPI ops in 8khz loop: extra cycles used for LEDs